PSTSWM T3D Serial Performance

Performance Studies using

PSTSWM


Cray Research T3D Serial Performance

Date/Person: August 12, 1996 / P. Worley
Platform: T3D at Cray Research in Eagen, MN (rain):
   128 150-MHz DEC Alpha EV4 processors
Environment: IS-9.0
Cray CF90 Version 0.1.2.3
Code Version: 6.1
Make Options: MACH=t3d COMM=mpi PRECISION=8 PERF=n WORKSPACE=5000000
Compilation Options: /mpp/bin/f90 -dp -Oscalar3
Number of steps: T42: 241 or 481
T85: 49 or 97
Notes: no blocked Fourier transform library routines were available, so used PSTSWM Fortran routines

MEASURED TIME PER TIMESTEP (SEC)

Problem L1 L2 L3 L16
T42 .164 .324 .482 2.83
T85 .973 1.98 2.98  

MEASURED MFLOP/SEC RATES

Problem L1 L2 L3 L16
T42 25.2 25.4 25.7 23.3
T85 24.9 24.5 24.4  

Patrick H. Worley / ( worleyph@ornl.gov)
Last Modified Monday, 15-Jul-2002 10:24:04 EDT.
3428 accesses since 1/2/96.