PSTSWM SPP-1200 Serial Performance

Performance Studies using

PSTSWM


Convex SPP-1200 Serial Performance

Date/Person: September 9, 1996 / P. Worley
Platform: Convex SPP-1200 at National Center for Supercomputer Applications (lena.ncsa.uiuc.edu):
   64 120-MHz HP PA-RISC 7200 processors (8 Hypernodes)
Environment: SPP-UX_ail 3.2 L33 01/22/96
SPP-UX_mk 3.2.144 L33 OOW elvis:/tac1/3.2.144 [CNX_MPP1]
Code Version: 6.1
Make Options: MACH=convex PRECISION=8 PERF=n WORKSPACE=5000000
Compilation Options: mpif77 -O2 -Wl,+FPD   (/usr/convex/fc9.4)
Number of steps: T42: 241 or 481
T85: 49 or 97
Notes: Fourier transform library routines were not consistently better than PSTSWM Fortran routines; using Fortran routines.

MEASURED TIME PER TIMESTEP (SEC)

Problem L1 L2 L3 L16
T42 .166 .355 .533 2.89
T85 1.00 2.21 3.03  

MEASURED MFLOP/SEC RATES

Problem L1 L2 L3 L16
T42 24.9 23.3 23.2 22.9
T85 24.2 21.9 24.0  

Patrick H. Worley / ( worleyph@ornl.gov)
Last Modified Monday, 15-Jul-2002 10:22:42 EDT.
3345 accesses since 1/2/96.