PSTSWM Serial Performance

Performance Studies using

PSTSWM

Best Serial Performance for Each Platform

These results represent the highest MFlop rates for each platform, using math libraries where available and the best available compilers. The legends list the platforms in order of their performance (when there is an unambiguous ordering.) Two different MFlop rate measurements are presented. The first is the rate when a single processor is used on an SMP node (for platforms consisting of a cluster of SMPs). The second is the single processor rate when all processors are computing (the same problem) on an SMP node. This latter measurement also takes into account memory contention and other overhead, and is the more realistic metric.

Two graphs are presented for each problem resolution, one with SX-5 results and one without. The SX-5 values are so large relative to the other platforms that including it masks interesting details in the performance of the other platforms.

T42 MFlop rates

One Processor Per Node

All Processors

T85 MFlop rates

One Processor Per Node

All Processors

T170 MFlop rates

One Processor Per Node

All Processors

MFlop rates for 1 vertical level

One Processor Per Node

All Processors

MFlop rates for 16 vertical levels

One Processor Per Node

All Processors

Patrick H. Worley / ( worleyph@ornl.gov)
Last Modified Monday, 15-Jul-2002 10:22:35 EDT.
5354 accesses since 1/2/96.