DOE/DOD Workshop on Emerging High Performance Architectures and Applications

The high performance computing world is entering an era of architectural experimentation and innovation. The continuing march of Moore's Law has resulted in wide availability of space on a chip. Although currently used for multiple cores, in the near future, this space will be put to much more creative use. Among the more interesting, already-available possibilities are the massively multithreaded Cray XMT and high performance machines based on IBM's Cell processor.

This renaissance in architectural innovation creates opportunities to revisit applications that have struggled to achieve high performance on traditional machines. Examples include sparse direct methods, graph algorithms and agent-based simulations. How are these and other applications likely to perform on emerging machines? What new machines and architectural paradigms have greatest promise for these and other applications of importance to DOE and DOD? These are the questions this workshop will try to address, with a particular focus on XMT and Cell.

The workshop will bring together communities that interact too infrequently - application experts and computer architects. It will also include experts in programming environments, tools and software. The output of the workshop will be a report detailing the impact of these emerging architectures on challenging DOE and DOD applications.

This year's conference organizers are:

Bill Carlson, IDA
Bruce Hendrickson, Sandia National Laboratories
John Johnson, Lawrence Livermore National Laboratory
Michael Merrill, DOD
Jarek Nieplocha, Pacific Northwest National Laboratory
Lenny Oliker, Lawrence Berkeley National Laboratory
Jeffrey Vetter, Oak Ridge National Laboratory and Georgia Tech