R&D Phase Overview
- High Speed, low latency, low power serial links.
- Bi-directional links reduce I/O count. (On-chip and off-board)
- Packaging effects (cards, connectors, cables) critical here.
- Hardware assisted message passing for low latency and simple software.
- Global functions are often required
- Global Broadcast.
- Simple, Low-Latency Arithmetic Functions.
- Extends Reach of Architecture.
- Eases Software Complexity.
- SOC node
- Cougar-like pico-kernel/front-end
- Compiler back-end and debugging